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RTL Design Engineer for PCIe/CXL IP – Next‑Gen Compute

AMD

Vancouver, Canada

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Job Description

A leading technology company in Vancouver, BC, is seeking a motivated individual for microarchitectural design and RTL implementation of PCI Express and Compute Express Link IP. The ideal candidate will have over 2 years of design experience in the ASIC industry, along with strong analytical and problem-solving skills. This role involves collaborating with designers and verification teams, making significant contributions to AMD’s next-generation products. Join us to thrive in a dynamic environment shaped by innovation.
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